In various DRAM and SDRAM application, ZQ calibration is used to tune the drive strength of output drivers and on-die termination (ODT) values across multiple chips and/or devices. Multi-chip packages, package on packages (POP) or multi-channel chips are generally only provided with one external ZQ resistor. Thus, at any given time, the ZQ resistor can only be used by a single chip for ZQ calibration. When two or more chips request to use the ZQ resistor at the same time, an arbiter circuit is typically used to determine which chip should access the ZQ resistor. Accordingly, only one chip can access the ZQ resistor, and a subsequent chip may only access the ZQ resistor after ZQ calibration has been completed.
Conventional arbiter circuits rely on a voltage based arbitration scheme to determine which chip, a master chip or slave chip, has issued a ZQ calibration request. For example, a ZQ calibration request issued by the master chip may have a strong pulldown, while a ZQ calibration request issued by the slave chip may have a weak pulldown. Thus, the various states of use of the ZQ resistor may be determined, via the ZQ pad voltage, such as 1) whether the ZQ resistor is not in use; 2) whether the master chip has issued a ZQ calibration request; 3) whether the slave chip has issued a ZQ calibration request; and 4) whether the ZQ resistor is currently in use for ZQ calibration. In order to differentiate between the four states, typically the ZQ pad voltages associated with each of the above four states rely on wide potential differences. Thus, conventional voltage-based arbitration schemes are typically limited to working effectively for 2-chip packages with a VDDQ of 1.1 V. Chip packages with more than 2-chips, or utilizing VDDQ lower than 1.1 V may not be able to effectively differentiate between the four states via the ZQ pad voltage.
Thus, an arbitration circuit implementing an arbitration scheme is needed for a system having a plurality of chips and low-power memory applications.